Internal source code for the Display Pipe and Plane (DPP) hardware block inside AMD's DCN 2.01 display controller generation, which is part of the larger amdgpu display stack used by APUs such as those in early custom silicon designs around 2020.
This is not actually a standalone driver directory; it is one small internal component of AMD's amdgpu display core (DC) implementation. It only makes sense as part of the wider amdgpu driver and cannot be evaluated for keep-or-remove on its own.
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monthly commits · 2021-04-21 → 2026-04-21 · 3 total · active in 2/61 months
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codex reasoning notes (technical)
Not a driver directory: this is an internal AMD DCN2.01 display-pipeline block implementation under the amdgpu display stack, not a standalone kernel-bound hardware driver.