A small piece of ASIC-specific support code inside AMD's Display Core stack that handles the memory hub bypass block on Display Core Next 2.0 generation GPUs (Navi/RDNA, circa 2019). It is part of how the amdgpu driver routes display surface data through GPU memory.
This is not a standalone driver; it is an internal subcomponent of the amdgpu Display Core for DCN 2.0 hardware. It ships and is maintained as part of the larger AMD GPU driver and has no independent lifecycle to evaluate.
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monthly commits · 2021-04-21 → 2026-04-21 · 2 total · active in 2/61 months
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codex reasoning notes (technical)
Not a driver directory: ASIC-specific AMD DC mmhubbub/display helper code under amdgpu DC, not a standalone kernel-bound hardware driver.