drivers/gpu/drm/amd/display/dc/optc/dcn401

AMD DCN 4.01 Output Timing Controller block

Internal source code for the Output Timing Controller (OPTC) hardware block within AMD's Display Core Next 4.01 generation, used by recent Radeon and Ryzen integrated GPUs to drive display timings, sync signals, and pixel pipeline scheduling on the panel side.

not-a-driver conf=1.00 deploy=none replacement=none subsystem=gpu category=not-a-driver

100%

recommendation

This is not a standalone driver but a sub-component of the larger amdgpu Display Core stack, implementing one specific IP block (the OPTC) for the DCN 4.01 generation of AMD display hardware. It only makes sense as part of the full amdgpu driver tree and would not be evaluated for keep/remove on its own.

repository signals

2 files

748 source lines

16 commits, 5y

+790 / −42 lines added / removed, 5y

12 authors, 5y

monthly commits · 2021-04-21 → 2026-04-21 · 16 total · active in 11/61 months

sources

No sources cited.

codex reasoning notes (technical)

Not a driver directory: contains AMD Display Core DCN401 OPTC/IP-block implementation code under amdgpu, not a standalone kernel-bound hardware driver.