drivers/phy/cadence

Cadence Torrent, Sierra, Salvo, and MIPI D-PHY controllers

A collection of PHY (physical-layer) controller blocks designed by Cadence and licensed into many modern system-on-chip designs. They handle the analog signalling for high-speed interfaces such as PCIe, USB 3.0, MIPI camera and display links, and other multi-protocol SerDes lanes found in current ARM SoCs like NXP's i.MX95.

keep conf=0.85 deploy=medium replacement=none subsystem=phy category=bus-other
85%

recommendation

It should stay in the kernel because the underlying Cadence PHY IP is still being licensed into new silicon shipping in 2025, and upstream activity reflects that — Torrent, Sierra, and D-PHY all received fixes on the linux-phy list during 2025. NXP's i.MX95 and other current SoCs rely on these blocks, and no other in-tree driver covers the same Cadence-specific hardware, so there is no replacement to migrate to.

repository signals

7 files
10,029 source lines
90 commits, 5y
+7,883 / −3,884 lines added / removed, 5y
29 authors, 5y
monthly commits · 2021-04-21 → 2026-04-21 · 90 total · active in 27/61 months
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sources

  1. lore.kernel.org

    linux-phy saw a Cadence Torrent functional fix in December 2025, indicating active upstream maintenance rather than retirement.

  2. lore.kernel.org

    linux-phy carried a substantial Cadence D-PHY fix series in September 2025, showing ongoing bug-fix traffic for this directory.

  3. lore.kernel.org

    Cadence Sierra still received 2025 cleanup touches in linux-phy, so the code is not abandoned.

  4. nxp.com

    NXP lists the i.MX95 family as Active and exposes USB 3.0, USB 2.0, PCIe Gen3, and MIPI camera/display PHY-equipped connectivity, consistent with continued deployment of Cadence-backed PHY IP in current SoCs.

  5. cadence.com

    Cadence still markets multi-protocol SerDes PHY IP as a current product line for volume-production SoCs, supporting the view that this class of Cadence PHY hardware remains commercially relevant.

  6. cadence.com

    Cadence continues to sell newer PCIe/CXL PHY IP, indicating the vendor's PHY portfolio is current rather than legacy-only.

codex reasoning notes (technical)

Real driver directory: local tree inspection showed platform PHY drivers and Kconfig entries for Torrent, Sierra, Salvo, and D-PHY variants. Active-maintenance evidence came from lore-http `lore_regex` on linux-phy patch diffs, which returned 2025 Cadence Torrent/D-PHY/Sierra patches at the cited lore URLs. Deployment evidence came from web search results on NXP i.MX95 and Cadence product pages. Salvo is locally described as legacy USB-only, but the directory overall covers multiple still-current Cadence PHY IP blocks. No natural upstream replacement driver covers the same Cadence-specific PHY blocks, so removal/deprecation is not justified.