Xilinx/AMD Zynq UltraScale+ MPSoC GT high-speed transceiver PHY
Controls the multi-protocol high-speed serial transceivers built into AMD (formerly Xilinx) Zynq UltraScale+ MPSoC chips, configuring the shared SerDes lanes for USB 3.0, SATA 3.1, DisplayPort, PCIe, and SGMII Ethernet links. These SoCs combine ARM cores with FPGA fabric and have been shipping since around 2016 into embedded, industrial, and automotive designs.
recommendation
It should stay in the kernel because the Zynq UltraScale+ MPSoC family is still actively sold by AMD with product longevity commitments through 2045, and the PHY code was still being touched as part of upstream subsystem refactoring in 2026. Because the transceiver block is built into the SoC, no other driver can replace it for boards using this silicon.
repository signals
sources
- lore.kernel.org
`phy-zynqmp.c` was still being updated as part of a PHY subsystem refactor in March 2026, which is evidence the driver remains integrated with active upstream work rather than abandoned.
- amd.com
AMD still markets Zynq UltraScale+ MPSoCs, states UltraScale+ adaptive SoCs are supported through 2045, and lists USB 3.0, SATA 3.1, DisplayPort, and Gigabit Ethernet capabilities that match this PHY driver's use cases.
- amd.com
Automotive-grade Zynq UltraScale+ XA MPSoCs are still actively marketed, supporting the conclusion that new niche deployments continue in 2025-era embedded/industrial/automotive designs.
codex reasoning notes (technical)
Local source inspection via `exec_command` showed this directory contains only `phy-zynqmp.c`, a real PHY driver for ZynqMP high-speed transceivers handling USB/SGMII/SATA/DisplayPort on ZynqMP SoCs. `lore_file_timeline` on `drivers/phy/xilinx/phy-zynqmp.c` showed continued upstream touchpoints through 2026; the cited lore URL came from that tool. AMD product URLs were obtained by web search (`turn0search0` and `turn0search1`) and show the silicon family is still sold with long lifecycle commitments. This is specialized embedded hardware with ongoing but niche deployment, so keep rather than deprecate; there is no natural upstream replacement driver because the PHY is SoC-specific.